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Memory Subsystem Verification Engineer, Platforms

Company: Google
Location: Sunnyvale
Posted on: May 3, 2021

Job Description:

Minimum qualifications: + Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, related field or equivalent practical experience. + 4 years of experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem and full-chip level. + Experience applying computer architecture principles. + Experience with code review, testing, and or refactoring. Preferred qualifications: + PhD degree in Electrical Engineering, Computer Engineering, or Computer Science. + 6 years of experience verifying control and interface logic for memory technologies (e.g. DDR, HBM, GDDR). + Experience with reusable testbench design and development at subsystem level. + Experience in C/C++ or System Verilog based tests, test sequence development. + Experience with the creation of and usage of verification components and environments in a standard verification methodology such as VMM, OVM, or UVM. Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Memory Subsystem Verification Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users. As a Memory Subsystem Verification Engineer within the Chip Implementation and Infrastructure Engineering IO subystem team you will participate in the verification of custom ASIC designs critical to Google's mission. Our hardware is used to accelerate and serve workloads essential to Google's users.You'll see the impact of your work in the Google products you enjoy each day. Come use your passion and background for elegant hardware verification to develop state-of-the-art custom memory interface logic to create products that are making a real difference. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. + Verify complex digital design blocks integration at Subsystem level by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. + Create and enhance constrained-random verification environments using UVM/ SystemVerilog or Create complex multi core based C tests using reusable C test libs. + Identify and write all types of coverage measures for stimulus and corner-cases. + Debug tests with design engineers to deliver functionally correct design blocks. + Close coverage measures to identify verification holes and to show progress towards tape-out. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy (/eeo/) and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing this form (l/forms/aBt6Pu71i1kzpLHe2) .

Keywords: Google, Sunnyvale , Memory Subsystem Verification Engineer, Platforms, Other , Sunnyvale, California

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