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ASIC Engineer

Company: Juniper Networks
Location: Sunnyvale
Posted on: May 3, 2021

Job Description:

About the Position:ASIC/FPGA Frontend verification engineer adept at System Verilog, UVM, C-modelling and industry standard simulation toolsResponsibilities:Create verification plan for testing ASIC/FPGA designsCreate verification environment in System Verilog and UVMCreate, run and debug tests in System Verilog/UVM environmentMinimumQualifications:Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering or Computer Science.Three years work experience in Electronics Engineering domainKnowleadge of System Verilog and industry-standard VLSI simulation tools.Note: If they do not possess these, they will not be considered as meeting the basic requirements of position>Preferred Qualifications:Programming skills in C/C++/Python/PerlWork experience in Networking domainNote: If they do not possess these, they still will be considered as meeting the basic requirements of position>Other Information:Relocation is available for this positionNo Travel requirements for the positionFull timeSDL2017

Keywords: Juniper Networks, Sunnyvale , ASIC Engineer, Other , Sunnyvale, California

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