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Senior ASIC Logic & Physical Design Engineer (Sunnyvale, CA)

Company: Tachyum Inc.
Location: Sunnyvale
Posted on: June 5, 2024

Job Description:

Level: Experienced, Full Time Employee
Responsibilities


  • Responsibility for design of high performance and low power data processing chip
  • Drive and deliver gate level netlist and placement in line with new computational mechanism
  • Micro-architectural definition, writing micro-architecture specifications
  • Write high performance / low power RTL, Synthesis and Timing closure
  • Floor-planning, place and route, including scripted and hand placement of logic
  • Explore and characterize SRAM tradeoffs, and cell sizing optimizations
  • Collaborate with the verification team to verify the correctness of your unit
  • Work with implementation to achieve timing, area, performance and power goals
  • Identify performance bottlenecks and optimize system performance

    Qualifications

    • Member of core team responsible for the crafting and timely delivery of a specific HW units
    • A strong background in computer architecture is highly desirable
    • Strong communication and interpersonal skills required to work with our global design team
    • Successful track record of mentoring junior engineers and interns a plus
    • More than 5 years of experience in high performance semiconductor designs
    • Verilog expertise and a deep understanding of ASIC design flow
    • Expertise in RTL design, logic synthesis, prototyping, timing analysis, floor-planning
    • BS or MS Degree in Electrical Engineering or Computer Science
    • The ability to learn new technologies and apply that knowledge quickly
    • Proven track record demonstrating the ability to meet project milestones and deadlines


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Keywords: Tachyum Inc., Sunnyvale , Senior ASIC Logic & Physical Design Engineer (Sunnyvale, CA), Engineering , Sunnyvale, California

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