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Pre-Si Validation Engineer

Company: INTEL
Location: Sunnyvale
Posted on: November 25, 2022

Job Description:

Job DescriptionCome and be a part of the team creating SoC and chip-set designs and products for Intel Architecture.This position is a role within the Chipsets Silicon Group SOC Front-End Design team, building SoC products for client and server markets. In this position, the Engineer will perform integration and validation of IP designs at the SOC level.The work will include features and behaviors fundamental to the platform, as well as interoperability with the other IPs and blocks in the SOC and platform.The engineer will work with, and gain exposure to, specialist teams and engineers including full-chip, micro-architecture, validation architecture, emulation modeling and validation, IP design, and structural/physical design; will gain exposure on platform architecture, design, and features; and will participate in debug at various level of the hierarchy.Responsibilities in this role may include:

  • Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
  • Determines architecture design, logic design, and system simulation.
  • Defines module interfaces/formats for simulation.
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
  • Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.This is an entry level position and will be compensated accordingly.Minimum Qualifications:The candidate must have a Bachelor's degree in in Electrical/Electronics Engineering (EE), Computer Engineering (CE), or Computer Science CS -OR- a Master's degree in Electrical Engineering (EE), Computer Engineering (CE), or Computer Science CS and 1+ years of work experience in:
    • System Verilog OVM or UVM or Object-Oriented Programming (OOP).
    • Logic design or micro-architecture fundamentals.Preferred Qualifications:
      • Knowledge of standard bus protocols like PCI or IOSF or AHB.
      • Knowledge of C/C or Perl scripting.Inside this Business GroupIn the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Other LocationsUS,CA,Folsom;US,OR,PortlandCovid StatementIntel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Keywords: INTEL, Sunnyvale , Pre-Si Validation Engineer, Engineering , Sunnyvale, California

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