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ASIC Verification Engineer

Company: Juniper Networks
Location: Sunnyvale
Posted on: July 31, 2022

Job Description:

This position has the potential to be transferred to Juniper USA after completing one year of employment. The transfer will be subject to standard transfer eligibility requirements.ASIC Verification EngineerJuniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training and teamwork within a collaborative and innovative culture.Responsibilities:Block level, sub-system level and full chip level verification of complex networking ASICs using SystemVerilog/UVM/SystemC/C++ and emulation methodologies. Post silicon and system level validation using Python/C++ scripts and tools.Specific job duties:

  • Review ASIC functional specifications. Create test plan documents that describe test strategies and test environments. Create spreadsheet documents that describe details of test cases. Conduct reviews of test plan and test list documents with peers and technical leads.
  • Create block level, sub-system (a sub-system is an entity composed of multiple blocks) and full chip level test environments using SystemVerilog and UVM methodologies
  • Create architecture models for ASICs in C++ or SystemC. Using C++/SystemC, create test environments and test cases to validate architectural models. Develop tools like scripts, compilers and parsers in Python and/or C++ to enable testing of models
  • Create test cases using SystemVerilog and UVM methodologies. Run the test cases, work with the designers to debug failing test cases and identify design bugs. Verify that the design is performing in accordance to the functional specifications
  • Perform emulation related activities by creating scripts and test cases in Python or C++, debug failing tests and work with the designers to ensure that the design is functioning according to specifications
  • Create documentation to help software team in programming networking ASICs, assist software team in debugging failing tests on the system. Perform testing of networking silicon in systems using Python/C++Minimum Qualifications:
    • Bachelor's in Electrical Engineering, Computer Engineering or Computer Science, Master's strongly preferred
    • 10+ years of professional experience
    • Experience with SystemVerilog/UVM based verification methodologies
    • Exposure to Perl/Python, C/C++/SystemCJuniper is changing what's possible in networking. We're going beyond building the networks customers expect - we're building the networks customers deserve. And the world is taking note. But to continue to excel, we have work to do. Change in our industry is accelerating. To power connections and empower change, we need radical thinkers, eternal optimists, and energized personalities. We need people like you.Success requires big thinking and high-reaching goals. Our culture breeds innovation. Here, you will have the opportunity to take chances and let your ideas grow. You will be supported by thoughtful, inclusive, and accessible leaders. You will have every chance to be a part of the conversation and seize our momentum. Your career will be better for it.At Juniper, we strive to deliver network experiences that transform how people connect, work and live. We Power Connections, Empower Change, and we do that through our core values Being Bold, Building Trust and Delivering Excellence.Do you want to solve complex problems and build systems that will change the Internet? Do you want to be part of a company that is on the cutting edge of technology? Do you want to work with a world-class team of engineers?

Keywords: Juniper Networks, Sunnyvale , ASIC Verification Engineer, Engineering , Sunnyvale, California

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