Principal Design Verification Engineer
Company: Microsoft
Location: Sunnyvale
Posted on: June 16, 2022
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Job Description:
Join us to build the world's fastest supercomputer! Our
interdisciplinary team is solving cutting edge technical challenges
across software and hardware. This is your chance to impact the
future of computing by contributing to the technologies
underpinning Azure's accelerated computing platform.Our team is
responsible for next-generation programming models for the hardware
accelerators that power some of Microsoft's most important and
strategic projects in the cloud.In this role, you will have the
opportunity to innovate on Design Verification methodologies
including UVM block level testbenches and associated verification
IP and HW/SW integration in an FPGA gate level deployment cycle
that takes hours instead of months. You should be excited to learn
about new technologies and enjoy working in a fast-paced
environment with a rapidly evolving technology stack. - You should
also be comfortable dealing with ambiguity and rapidly evolving
designs. Good communication skills are a must.If you thrive in a
diverse and collaborative environment (even while social
distancing) and enjoy finding bugs while working on novel machine
learning acceleration hardware for Azure, then this is the position
for you.#azureahajobsResponsibilitiesYou will be driving the
testbench architecture and verification IP for machine learning
applications in the cloud.QualificationsRequired10+ years of
technical engineering experience in UVM or similar verification
frameworks.OR Bachelor's degree in Electrical Engineering, Computer
Engineering, Mechanical Engineering, or related field AND 8+ years
of technical engineering experience.OR Master's degree in
Electrical Engineering, Computer Engineering, Mechanical
Engineering, or related field AND 5+ years of technical engineering
experience.OR Doctorate degree in Electrical Engineering, Computer
Engineering, Mechanical Engineering, or related field AND 4+ years
of technical engineering experience.PreferredExperience leading by
example to deliver verification IP's and implement complex test
plans.Experience mentoring and presenting new methodologies and
approaches.Microsoft is an equal opportunity employer. All
qualified applicants will receive consideration for employment
without regard to age, ancestry, color, family or medical care
leave, gender identity or expression, genetic information, marital
status, medical condition, national origin, physical or mental
disability, political affiliation, protected veteran status, race,
religion, sex (including pregnancy), sexual orientation, or any
other characteristic protected by applicable laws, regulations and
ordinances. - We also consider qualified applicants regardless of
criminal histories, consistent with legal requirements. If you need
assistance and/or a reasonable accommodation due to a disability
during the application or the recruiting process, please send a
request -via the Accommodation request form.Benefits/perks listed
below may vary depending on the nature of your employment with
Microsoft and the country where you work.Benefits and PerksIndustry
leading healthcareSavings and investmentsGiving programsEducational
resourcesMaternity and paternity leaveOpportunities to network and
connectDiscounts on products and servicesGenerous time awayJob
SummaryJob number: 1312315Date posted : 2022-04-11Travel:
0-25%Profession: Hardware EngineeringRole type: Individual
ContributorEmployment type: Full-TimeExperience: Experienced
professionals
Keywords: Microsoft, Sunnyvale , Principal Design Verification Engineer, Engineering , Sunnyvale, California
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