Verification Engineer
Company: eInfochips, Inc.
Location: Sunnyvale
Posted on: September 16, 2020
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Job Description:
Roles and Responsibilities 7+ years of ASIC verification
experience UVMSystem Verilog VCS simulator, Verdi 2, 3 projects
experience with UVM based testbench, coverage closure Scripting
skills (Perl, Python) Job Description Any specific needs such as
NVME, PCIE, SATA SAS etc NVMe would be good. But, not a
must.SDL2017
Keywords: eInfochips, Inc., Sunnyvale , Verification Engineer, Engineering , Sunnyvale, California
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